Adder circuitry is useful in various integrated circuits, especially in data processor-based integrated circuits. Several types of adder circuits are known in the art. A basic carry propagate adder (CPA) includes a number of identical full adder cells equal to the width of the adder. Full adder cells are well-known in the art and each full adder cell has an A operand input, a B operand input, a carry input, a sum output, and a carry output. The adder cells are ordered from least-significant to a most-significant. A carry output of each adder cell, except the most-significant adder cell, is provided to a carry input of a subsequent adder cell. In this way, the adder cells are chained together. The final sum is just a concatenation of each of the sum output bits. The worst-case speed of the basic CPA is the amount of time it takes for a carry, resulting from valid operand inputs to the least-significant adder cell, to propagate through the adder. Because the sum and carry outputs of any adder cell are not valid until a propagation delay after the carry input received from the previous adder cell is valid, the sum and carry outputs of the most-significant adder cell are not valid until a carry from the least-significant is propagated through all the adder cells.
In an effort to overcome the speed limitations of the basic CPA, designers have designed various alternative schemes. A carry-lookahead adder (CLA) groups the operand bits and simultaneously processes the carry out of the group with the sum outputs. This simultaneous processing allows an early decision of whether a carry is to be propagated to a subsequent adder group. Thus, addition in the subsequent adder groups may begin earlier. Known CLAs use identical adder groups, whose circuitry can be laid out easily.
A carry-save adder (CSA) has full adder cells corresponding to each operand bit position. However, the carry signals are not chained. Instead, the carry output from each cell is saved and provided to a subsequent adder stage for eventual inclusion in the final sum output and carry output, if any. Adders implemented in CSA stages are well-known in the art. For example, CSA stages are useful as part of a modified Booth's array in a modified Booth's multiplier.